The application, versatility, and complexity of embedded systems are growing at the average rate of 14% annually. Such a growth requires acceleration in the time-to-market window while increasing yet their complexity. Due to their short design and production time the use of new and error-free design approaches that emphasize use of modern and high-level design tools and hardware/software tradeoffs are essential. These tools allow engineers to develop and test their designs before a single prototype is built. Virtual prototyping approach is relatively new methodology to permit such a design and virtual production in an integrated framework that is based on design principles that engineers perceive intuitively. It is a top down design approach for creating a virtual prototype for specification, design, simulation, and verification of hard- (HW) and software (SW) concurrently. It allows simultaneous HW and SW development and provides means for capturing information at various design stages with higher accuracy, lower cost, better efficiency at a shorter time compared to the traditional practice of design. In this paper we address issues involved in using the methodology of virtual prototyping and its outcome in teaching embedded system design. This approach permits students to gain insight on the details of system level design, its performance, and its error free functionality without physically building one.
|Original language||English (US)|
|Journal||ASEE Annual Conference and Exposition, Conference Proceedings|
|Publication status||Published - Jan 1 2009|
|Event||2009 ASEE Annual Conference and Exposition - Austin, TX, United States|
Duration: Jun 14 2009 → Jun 17 2009
ASJC Scopus subject areas