A unified approach is developed for solving the general problem of minimizing the number of via holes in a two-layer VLSI channel using switch-box routing with moval terminals. No doglegs are allowed, and all horizontal segments of the nets are assumed to be in one layer and the vertical segments in the other layer. Each net can have multiple terminals. Three different models are considered: two-row channel routing, three-sided switch-box routing, and four-sided switch-box routing.
|Original language||English (US)|
|Title of host publication||Unknown Host Publication Title|
|Number of pages||7|
|Publication status||Published - Jan 1 1987|
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