Early error detection in industrial strength cache coherence protocols using SQL

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

A table-driven approach for designing industrial strength cache coherence protocols based on relational database technology is described. Protocols are specified using several interacting multi-input, multi-output controller state machines represented as database tables. Protocol scenarios specified using SQL constraints are solved to automatically generate database tables, and to statically check protocol properties including absence of deadlocks and other protocol invariants. The debugged tables are mapped to hardware using SQL operations while preserving protocol properties. The approach is deployed at Fujitsu System Technology Division in the design of their next generation multiprocessor and has discovered several errors early in the design cycle.

Original languageEnglish (US)
Title of host publicationProceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)0769519261, 9780769519265
DOIs
StatePublished - 2003
EventInternational Parallel and Distributed Processing Symposium, IPDPS 2003 - Nice, France
Duration: Apr 22 2003Apr 26 2003

Other

OtherInternational Parallel and Distributed Processing Symposium, IPDPS 2003
CountryFrance
CityNice
Period4/22/034/26/03

Fingerprint

Cache Coherence
Error Detection
Error detection
Tables
Hardware
Controllers
Deadlock
State Machine
Relational Database
Multiprocessor
Division
Table
Controller
Cycle
Scenarios
Invariant
Output

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Theoretical Computer Science
  • Software

Cite this

Subramaniam, M. (2003). Early error detection in industrial strength cache coherence protocols using SQL. In Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003 [1213518] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPDPS.2003.1213518

Early error detection in industrial strength cache coherence protocols using SQL. / Subramaniam, Mahadevan.

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003. Institute of Electrical and Electronics Engineers Inc., 2003. 1213518.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Subramaniam, M 2003, Early error detection in industrial strength cache coherence protocols using SQL. in Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003., 1213518, Institute of Electrical and Electronics Engineers Inc., International Parallel and Distributed Processing Symposium, IPDPS 2003, Nice, France, 4/22/03. https://doi.org/10.1109/IPDPS.2003.1213518
Subramaniam M. Early error detection in industrial strength cache coherence protocols using SQL. In Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003. Institute of Electrical and Electronics Engineers Inc. 2003. 1213518 https://doi.org/10.1109/IPDPS.2003.1213518
Subramaniam, Mahadevan. / Early error detection in industrial strength cache coherence protocols using SQL. Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003. Institute of Electrical and Electronics Engineers Inc., 2003.
@inproceedings{a49804ee68004cddb667305359b8758d,
title = "Early error detection in industrial strength cache coherence protocols using SQL",
abstract = "A table-driven approach for designing industrial strength cache coherence protocols based on relational database technology is described. Protocols are specified using several interacting multi-input, multi-output controller state machines represented as database tables. Protocol scenarios specified using SQL constraints are solved to automatically generate database tables, and to statically check protocol properties including absence of deadlocks and other protocol invariants. The debugged tables are mapped to hardware using SQL operations while preserving protocol properties. The approach is deployed at Fujitsu System Technology Division in the design of their next generation multiprocessor and has discovered several errors early in the design cycle.",
author = "Mahadevan Subramaniam",
year = "2003",
doi = "10.1109/IPDPS.2003.1213518",
language = "English (US)",
isbn = "0769519261",
booktitle = "Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Early error detection in industrial strength cache coherence protocols using SQL

AU - Subramaniam, Mahadevan

PY - 2003

Y1 - 2003

N2 - A table-driven approach for designing industrial strength cache coherence protocols based on relational database technology is described. Protocols are specified using several interacting multi-input, multi-output controller state machines represented as database tables. Protocol scenarios specified using SQL constraints are solved to automatically generate database tables, and to statically check protocol properties including absence of deadlocks and other protocol invariants. The debugged tables are mapped to hardware using SQL operations while preserving protocol properties. The approach is deployed at Fujitsu System Technology Division in the design of their next generation multiprocessor and has discovered several errors early in the design cycle.

AB - A table-driven approach for designing industrial strength cache coherence protocols based on relational database technology is described. Protocols are specified using several interacting multi-input, multi-output controller state machines represented as database tables. Protocol scenarios specified using SQL constraints are solved to automatically generate database tables, and to statically check protocol properties including absence of deadlocks and other protocol invariants. The debugged tables are mapped to hardware using SQL operations while preserving protocol properties. The approach is deployed at Fujitsu System Technology Division in the design of their next generation multiprocessor and has discovered several errors early in the design cycle.

UR - http://www.scopus.com/inward/record.url?scp=84947249426&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84947249426&partnerID=8YFLogxK

U2 - 10.1109/IPDPS.2003.1213518

DO - 10.1109/IPDPS.2003.1213518

M3 - Conference contribution

SN - 0769519261

SN - 9780769519265

BT - Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2003

PB - Institute of Electrical and Electronics Engineers Inc.

ER -